Altera EPM3128ATC100-10N — MAX 3000A Complex Programmable Logic Device (CPLD), 2,500 Usable Gates, 128 Macrocells, 10 ns Pin-to-Pin Delay, 3.0–3.6 V, 100-Pin TQFP Package, Date Code 20+, Tray of 37 pieces. CMOS EEPROM-based PLD with 3.3 V in-system programmability (ISP) via JTAG interface, MultiVolt I/O support for 2.5 V, 3.3 V, and 5.0 V systems, and programmable speed/power optimization per macrocell.
Available in stock — ships within 3 days after payment.
Product overview
| Part number | EPM3128ATC100-10N |
| Manufacturer | Altera (Intel) |
| Date code | 20+ |
| Quantity | 37 pieces (tray) |
| Device family | MAX 3000A |
| Device type | Complex Programmable Logic Device (CPLD) |
| Architecture | CMOS EEPROM-based |
| Usable gates | 2,500 |
| Macrocells | 128 |
| Logic array blocks (LABs) | 8 |
| Maximum user I/O pins | 98 (100-pin TQFP) |
| Pin-to-pin delay (tPD) | 10 ns (speed grade –10) |
| Maximum clock frequency | 98.0 MHz (internal, speed grade –10) |
| Supply voltage (VCCINT) | 3.0 V – 3.6 V (3.3 V nominal) |
| I/O voltage compatibility | 2.5 V, 3.3 V, and 5.0 V (MultiVolt I/O) |
| In-system programmability (ISP) | 3.3 V via IEEE Std. 1149.1 JTAG interface |
| Configuration memory | EEPROM (reprogrammable up to 100 times) |
| Operating temperature | –40 °C to +85 °C (Industrial) |
| Package | 100-pin TQFP (TC100) |
| RoHS compliant | Yes |
| Condition | New — in original packaging (OVP) |
Applications
- Glue logic, bus interfacing, and address decoding in embedded and industrial systems
- State machine and combinatorial logic implementation in control applications
- Mixed-voltage system integration requiring 2.5 V, 3.3 V, and 5.0 V I/O compatibility
- Field-upgradeable logic in telecom, automotive, and industrial equipment via ISP
Shipping
- Ships within 3 days after payment
- Secure packaging for safe delivery
- Free delivery within Germany
Warranty & compliance
- 12-month warranty included
- Product is fully compliant with EU industry standards
- VAT invoice included with every order
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